Introduction
The first single chip microprocessor came in 1971 by Intel Corporation. It was called Intel 4004 and that was the first single chip CPU ever built. We can say that was the first general purpose processor. Now the term microprocessor and processor are synonymous. The 4004 was a 4-bit processor, capable of addressing 1K data memory and 4K program memory. It was meant to be used for a simple calculator. The 4004 had 46 instructions, using only 2,300 transistors in a 16-pin DIP. It ran at a clock rate of 740kHz (eight clock cycles per CPU cycle of 10.8 microseconds). In 1975, Motorola introduced the 6800, a chip with 78 instructions and probably the first microprocessor with an index register. In 1979, Motorola introduced the 68000. With internal 32-bit registers and a 32-bit address space, its bus was still 16 bits due to hardware prices. On the other hand in 1976, Intel designed 8085 with more instructions to enable/disable three added interrupt pins (and the serial I/O pins).
They also simplified hardware so that it used only +5V power, and added clock-generator and bus-controller circuits on the chip. In 1978, Intel introduced the 8086, a 16-bit processor which gave rise to the x86 architecture. It did not contain floating-point instructions. In 1980 the company released the 8087, the first math co-processor they'd developed. Next came the 8088, the processor for the first IBM PC. Even though IBM engineers at the time wanted to use the Motorola 68000 in the PC, the company already had the rights to produce the 8086 line (by trading rights to Intel for its bubble memory) and it could use modified 8085-type components (and 68000-style components were much more scarce).
The development history of Intel family of processors is shown in Table 1. The Very Large Scale Integration (VLSI) technology has been the main driving force behind the development.
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Friday, October 8, 2010
Digital Electronics
Thursday, October 7, 2010
FIR filter
General Purpose Processor
loop:
lw x0, (r0)
lw y0, (r1)
mul a, x0,y0
add b,a,b
inc r0
inc r1
dec ctr
tst ctr
jnz loop
sw b,(r2)
inc r2
This program assumes that the finite window of input signal is stored at the memory location starting from the address specified by r1 and the equal number filter coefficients are stored at the memory location starting from the address specified by r0. The result will be stored at the memory location starting from the address specified by r2. The program assumes the content of the register b as 0 before the start of the loop.
lw x0, (r0)
lw y0, (r1)
These two instructions load x0 and y0 registers with values from the memory location specified by the registers r0 and r1 with values x0 and y0.
mul a, x0,y0
This instruction multiplies x0 with y0 and stores the result in a.
add b,a,b
This instruction adds a with b (which contains already accumulated result from the previous operation) and stores the result in b.
inc r0
inc r1
dec ctr
tst ctr
jnz loop
The above portion of the program increment the registers to point to the next memory location, decrement the counters, to see if the filter order has been reached and tests for 0. It jumps to the start of the loop.
sw b,(r2)
inc r2
This stores the final result and increments the register r2 to point to the next location.
Let us see the program for an early DSP TMS32010 developed by Texas
Instruments in 80s.
It has got the following features
• 16-bit fixed-point
• Harvard architecture separate instruction and data memories
• Accumulator
• Specialized instruction set Load and Accumulate
• 390 ns Multiple-Accumulate(MAC)
TI TMS32010 (Ist DSP) 1982
The program for the FIR filter (for a 3rd order) is given as follows:
Here X4, H4, ... are direct (absolute) memory addresses:
LT X4 ;Load T with x(n-4)
MPY H4 ;P = H4*X4
;Acc = Acc + P
LTD X3 ;Load T with x(n-3); x(n-4) = x(n-3);
MPY H3 ; P = H3*X3
; Acc = Acc + P
LTD X2
MPY H2
...
• Two instructions per tap, but requires unrolling.
; for comment lines.
LT X4 Loading from direct address X4.
MPY H4 Multiply and accumulate.
LTD X3 Loading and shifting in the data points in the memory.
The advantages of the DSP over the General Purpose Processor can be written as Multiplication and Accumulation takes place at a time. Therefore this architecture supports filtering kind of tasks. The loading and subsequent shifting is also takes place at a time.
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loop:
lw x0, (r0)
lw y0, (r1)
mul a, x0,y0
add b,a,b
inc r0
inc r1
dec ctr
tst ctr
jnz loop
sw b,(r2)
inc r2
This program assumes that the finite window of input signal is stored at the memory location starting from the address specified by r1 and the equal number filter coefficients are stored at the memory location starting from the address specified by r0. The result will be stored at the memory location starting from the address specified by r2. The program assumes the content of the register b as 0 before the start of the loop.
lw x0, (r0)
lw y0, (r1)
These two instructions load x0 and y0 registers with values from the memory location specified by the registers r0 and r1 with values x0 and y0.
mul a, x0,y0
This instruction multiplies x0 with y0 and stores the result in a.
add b,a,b
This instruction adds a with b (which contains already accumulated result from the previous operation) and stores the result in b.
inc r0
inc r1
dec ctr
tst ctr
jnz loop
The above portion of the program increment the registers to point to the next memory location, decrement the counters, to see if the filter order has been reached and tests for 0. It jumps to the start of the loop.
sw b,(r2)
inc r2
This stores the final result and increments the register r2 to point to the next location.
Let us see the program for an early DSP TMS32010 developed by Texas
Instruments in 80s.
It has got the following features
• 16-bit fixed-point
• Harvard architecture separate instruction and data memories
• Accumulator
• Specialized instruction set Load and Accumulate
• 390 ns Multiple-Accumulate(MAC)
TI TMS32010 (Ist DSP) 1982
The program for the FIR filter (for a 3rd order) is given as follows:
Here X4, H4, ... are direct (absolute) memory addresses:
LT X4 ;Load T with x(n-4)
MPY H4 ;P = H4*X4
;Acc = Acc + P
LTD X3 ;Load T with x(n-3); x(n-4) = x(n-3);
MPY H3 ; P = H3*X3
; Acc = Acc + P
LTD X2
MPY H2
...
• Two instructions per tap, but requires unrolling.
; for comment lines.
LT X4 Loading from direct address X4.
MPY H4 Multiply and accumulate.
LTD X3 Loading and shifting in the data points in the memory.
The advantages of the DSP over the General Purpose Processor can be written as Multiplication and Accumulation takes place at a time. Therefore this architecture supports filtering kind of tasks. The loading and subsequent shifting is also takes place at a time.
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Tuesday, October 5, 2010
Comparison of DSP with General Purpose Processor
Take an Example of FIR filtering both by a General Purpose Processor as well as DSP
An FIR (Finite Impulse Response filter) is represented as shown in the following figure.
The output of the filter is a linear combination of the present and past values of the input. It has several advantages such as:
- Linear Phase.
- Stability.
- Improved Computational Time.
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An FIR (Finite Impulse Response filter) is represented as shown in the following figure.
The output of the filter is a linear combination of the present and past values of the input. It has several advantages such as:
- Linear Phase.
- Stability.
- Improved Computational Time.
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Friday, October 1, 2010
What is Digital Signal Processing?
Application of mathematical operations to digitally represented signals:
- Signals represented digitally as sequences of samples.
- microphones) and analog-to- digital converters (ADC).
- Digital signals converted back to physical signals via digital-to-analog converters (DAC).
- Digital Signal Processor (DSP): electronic system that processes digital signals.
The above figure represents a Real Time digital signal processing system. The measurand can be temperature, pressure or speech signal which is picked up by a sensor (may be a thermocouple, microphone, a load cell etc). The conditioner is required to filter, demodulate and amplify the signal. The analog processor is generally a low-pass filter used for anti-aliasing effect.
The ADC block converts the analog signals into digital form. The DSP block represents the signal processor. The DAC is for Digital to Analog Converter which converts the digital signals into analog form. The analog low-pass filter eliminates noise introduced by the interpolation in the DAC.
The performance of the signal processing system depends to the large extent on the ADC. The ADC is specified by the number of bits which defines the resolution. The conversion time decides the sampling time. The errors in the ADC are due to the finite number of bits and finite conversion time. Some times the noise may be introduced by the switching circuits.
Similarly the DAC is represented by the number of bits and the settling time at the output.
A DSP tasks requires:
- Repetitive numeric computations.
- Attention to numeric fidelity.
- High memory bandwidth, mostly via array accesses.
- Real-time processing.
And the DSP Design should minimize.
- Cost .
- Power.
- Memory use.
- Development time.
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- Signals represented digitally as sequences of samples.
- microphones) and analog-to- digital converters (ADC).
- Digital signals converted back to physical signals via digital-to-analog converters (DAC).
- Digital Signal Processor (DSP): electronic system that processes digital signals.
The above figure represents a Real Time digital signal processing system. The measurand can be temperature, pressure or speech signal which is picked up by a sensor (may be a thermocouple, microphone, a load cell etc). The conditioner is required to filter, demodulate and amplify the signal. The analog processor is generally a low-pass filter used for anti-aliasing effect.
The ADC block converts the analog signals into digital form. The DSP block represents the signal processor. The DAC is for Digital to Analog Converter which converts the digital signals into analog form. The analog low-pass filter eliminates noise introduced by the interpolation in the DAC.
The performance of the signal processing system depends to the large extent on the ADC. The ADC is specified by the number of bits which defines the resolution. The conversion time decides the sampling time. The errors in the ADC are due to the finite number of bits and finite conversion time. Some times the noise may be introduced by the switching circuits.
Similarly the DAC is represented by the number of bits and the settling time at the output.
A DSP tasks requires:
- Repetitive numeric computations.
- Attention to numeric fidelity.
- High memory bandwidth, mostly via array accesses.
- Real-time processing.
And the DSP Design should minimize.
- Cost .
- Power.
- Memory use.
- Development time.
information shared by www.irvs.info
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