Basic Techniques of Cache Mapping

Direct Mapping

• Main memory address divided into 2 fields:

•Index which contains
- cache address.
- number of bits determined by cache size.
•Tag
- compared with tag stored in cache at address indicated by index.
- if tags match, check valid bit.

• Valid bit
-indicates whether data in slot has been loaded from memory.

• Offset
-used to find particular word in cache line.



Fully Associative Mapping

• Complete main memory address stored in each cache address.
• All addresses stored in cache simultaneously compared with desired address.
• Valid bit and offset same as direct mapping.



Set-Associative Mapping

• Compromise between direct mapping and fully associative mapping.
• Index same as in direct mapping.
• But, each cache address contains content and tags of 2 or more memory address locations.
• Tags of that set simultaneously compared as in fully associative mapping.
• Cache with set size N called N-way set-associative.
- 2-way, 4-way, 8-way are common.




nformation shared by www.irvs.info