DRAM Integration Problem and Memory Management Unit (MMU)

DRAM Integration Problem

• SRAM easily integrated on same chip as processor.

• DRAM more difficult.
o Different chip making process between DRAM and conventional logic.
o Goal of conventional logic (IC) designers:
- minimize parasitic capacitance to reduce signal propagation delays and power consumption.
o Goal of DRAM designers:
- create capacitor cells to retain stored information.
o Integration processes beginning to appear.

Memory Management Unit (MMU)

• Duties of MMU
- Handles DRAM refresh, bus interface and arbitration.
- Takes care of memory sharing among multiple processors.
- Translates logic memory addresses from processor to physical memory addresses of DRAM.

• Modern CPUs often come with MMU built-in.

• Single-purpose processors can be used.

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